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semiconductor technical data multistandard and pal/ntsc modulator ics dw suffix plastic package case 751d (so20l) 20 1 pin connections order this document by MC44353/d dtb suffix plastic package case 948e (tssop20) 20 1 3 11 4 5 8 9 10 (top view) v ccd osc gnd osc snd fil snd tun preem audio in 12 v cca 13 video in 14 mod gnd 15 rf out 16 v cc mod 17 mod gnd 6 osc 7 osc gnd 18 scl 120 2 amp in op out xtal 19 sda 1 motorola analog ic device data
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! ! " MC44353 multistandard modulator ic mc44354 pal/ntsc modulator ic mc44355 pal/ntsc modulator ic with mc44355 fixed video modulation index these modulator circuits are intended for use in vcrs, satellite receivers, settop boxes, video games, etc. an onchip high speed i 2 c compatible bus receiver is included and is used to set the channel, tuned by a pll over the full range in the uhf bands. the modulator incorporates a sound subcarrier oscillator, using a second pll to derive 4.5, 5.5, 6.0 and 6.5 mhz carrier frequencies, selectable by the bus. for the sound, either frequency modulation with preemphasis or amplitude modulation (MC44353 only) is possible. a control bit (MC44353 only) is used to select am sound with positive rf modulation (system l). the level of the sound carrier with respect to the vision carrier and the modulation depth of both sound and vision may be adjusted by means of the bus. in addition, an onchip video test pattern generator may be switched in with a 1.0 khz audio test signal. ? channel 21 through 69 uhf operation (471 mhz to 855 mhz) ? onchip low power operational amplifier for direct tuning varactor voltage ? singleended output for low cost and ease of interface ? low external component count ? high speed i 2 c bus compatible ? programmable video modulation depth (8 steps of 2.5%) ? programmable picture/sound carriers ratio and audio sensitivity (8 steps of 1.0 db) ? onchip programmable sound subcarrier oscillator (4.5 mhz to 6.5 mhz) ? onchip video test pattern generator with sound test signal (1.0 khz) ? v cc standby mode (typ 500 m a) ? transient output inhibit during pll lockup at poweron ordering information device operating temperature range package MC44353dtb t20 80 c tssop20 MC44353dw t20 80 c so20l mc44354dtb t a = 20 to +80 c tssop20 mc44354dw t a = 20 to + 80 c so20l mc44355dtb tssop20 mc44355dw so20l this document contains information on a new product. specifications and information herein are subject to change without notice. ? motorola, inc. 1998 rev 0
MC44353 mc44354 mc44355 2 motorola analog ic device data figure 1. MC44353 simplified block diagram modulator section pll section 10 11 7 6 5 4 2 1 3 9 8 13 14 12 16 15 17 18 19 20 v cc mod standby rf out mod gnd scl sda xtal preem audio osc gnd osc osc osc gnd op out v cca mod gnd video in snd fil snd tun v ccd amp in MC44353 peak white clip clamp phase/ freq comp sound osc + fm mod prog divider am mod video modulator + sound mix test pattern generator high speed bus uhf osc and drives 8 prescaler phase comp prog divider ref divider ref osc 8 2 3 3 30 12 3 7.8 khz 976 hz te2 te1 31.25 khz bias maximum ratings (note 1) rating symbol value unit supply voltage v cc 7 v operational amplifier output voltage 36 v operating ambient temperature t a 20 to 80 c storage temperature t stg 65 to 150 c notes: 1. maximum ratings are those values beyond which damage to the device may occur. for functional operation, voltages should be restricted to the recommended operating conditions. 2. esd data available upon request. electrical characteristics (parameter type: a100% tested, b100% correlation tested, ccharacterized on samples. ddesign parameter, vcc = 5.0 v, ta = 25c, video input 1.0 vpp, 10 step greyscale. step 3 [typ. 80%] modulation depth for pal; step 5 [typ 90%] modulation for secam l; p/s ration step 3 [typ 14.5 db]. rf output into 75 w load. unless otherwise noted.) (specifications only valid for envelope demodulation.) characteristic symbol min typ max unit type operating supply voltage range v cca ,v ccd , v cc mod 4.5 5.0 5.5 v d analog section supply current (v cc = 5.0 v) i cca 26 33 39.5 ma a digital section supply current (v cc = 5.0 v) i ccd 24 32 39 ma a modulator o/p section supply current (v cc = 5.0 v) i cc mod 6.0 9.0 11.5 ma a total supply current (v cc = 5.0 v) i cc 56 74 90 ma a during standby v cc mod 4.0 5.5 v d during standby (with data retension: v cc mod = 5.0v) i cc mod 0.5 1.0 ma b operational amplifier output voltage (through r pullup ) 30 35 v b operational amplifier output current (with rpullup = 560 k w 56 100 m a b test pattern sync pulse width t e1 4.0 4.7 5.6 m s a
MC44353 mc44354 mc44355 3 motorola analog ic device data electrical characteristics (continued) (parameter type: a100% tested, b100% correlation tested, ccharacterized on samples. ddesign parameter, vcc = 5.0 v, ta = 25c, video input 1.0 vpp, 10 step greyscale. step 3 [typ. 80%] modulation depth for pal; step 5 [typ 90%] modulation for secam l; p/s ration step 3 [typ 14.5 db]. rf output into 75 w load. unless otherwise noted.) (specifications only valid for envelope demodulation.) characteristic type unit max typ min symbol uhf comparator pump current (note 1) 2.0 4.0 6.0 m a a sound comparator pump current (note 2) 2.0 3.8 5.6 m a a opamp input current 20 na a oscillator stability negative resistance 1.0 k w d delay v cca/d to v cc mod application (see figure 2) t_sup_del 0 ns d v cca/d & v cc mod duration for standby mode function (see figure 2) t_sup_min 30 ms d notes: 1. current sources driven by the uhf phase comparactor, that are connected to pin 1. 2. current sources driven by the phase sound comparator, that are connected to pin 8. v cca/d v ccmod 5.0 v 0 v 0 v t_sup_min t_sup_del time 0 v 5.0 v figure 2. initial poweron and standby mode v cc timing diagram for proper operation of internal reset functions, v cca and v ccd (which must be applied simultaneously) may not be applied after v ccmod . normally, all v cc lines will come up at the same time. however, due to the possibility of a standby v cc to be applied to the v ccmod pin, care should be ensured that v ccmod is not applied before v cca and v ccd (which must be tied together). see the timing diagram and data retention function description. note that v cca/d and v ccmod must be activated above 4.5 v for a least 30 msecs before the device can operate correctly in standby mode. high speed i 2 c compatible bus characteristics (over functional temperature range v cc = 5.0 v) characteristic symbol min typ max unit type sda/scl output current at 0 v 10 m a a sda/scl low input level v il 1.5 v b sda/scl high input level v ih 3.0 v b sda/scl input current for input level from 0.4 v to 0.3 v cc 5.0 5.0 m a c sda/scl input level 0 v cc + 0.3 v d sda/scl capacitance c i 10 pf c ack low output level (sinking 3.0 ma) 0.3 1.0 v a ack low output level (sinking 15 ma) 1.5 v c
MC44353 mc44354 mc44355 4 motorola analog ic device data high speed i 2 c compatible bus characteristics (continued) (over functional temperature range v cc = 5.0 v) characteristic type unit max typ min symbol bus clock frequency 0 800 khz c bus free time between stop and start t buf 200 ns c setup time for start conditions t su;sta 500 ns c hold time for start condition t hd;sta 500 ns c data setup time t su;dat 0 ns c data hold time t hd;dat 0 ns c setup time for stop condition t su;sto 500 ns c hold time for stop condition t hd;sto 500 ns c acknowledge propagation delay t ack;low 300 ns c sda fall time at 3.0 ma sink and 130 pf load 50 ns c sda fall time at 3.0 ma sink and 400 pf load 80 ns c sda/scl rise time 300 ns c scl fall time 300 ns c pulse width of spikes suppressed by the input filter t sp 50 ns c 0 v v cc v ih v il not defined t buf t hd;dat t su;dat t su;sto t hd;sta t ack:low start stop t su;sta chip address t hd;sto start stop sda scl sda scl sda scl ack figure 3. timings definition figure 4. levels definition
MC44353 mc44354 mc44355 5 motorola analog ic device data high speed i 2 c compatible bus format bit 7 bit 0 ack ca chip address 1 1 0 0 1 0 1 0 ack c0 low order bits vmd2 vmd1 vmd0 sfd1 sfd0 tb2 tb1 tb0 ack c1 high order bits 1 amd2 amd1 amd0 psd2 psd1 psd0 sysl ack fl low order bits n 5 n 4 n 3 n 2 n 1 n 0 x 1 x 0 ack fm high order bits 0 tpen n 11 n 10 n 9 n 8 n 7 n 6 ack notes: 1. c0 and fl: low order bits and c1 and fm: high order bits. 2. vdm02: video mod depth control bits (for mc44355 vmd02 are don't care). 3. sfd01: sound subcarrier frequency control bits. 4. tb02 and x 1 , x 0 : test modes bits, see table entitled test modes. 5. amd02: audio modulation sensitivity, see table entitled audio modulation sensitivity (for mc44355 amd02 are don't care). 6. psd02: picture to sound carrier ratio, see table entitled picture to sound carrier ratio (for mc44355 psd01 are don't care). 7. sysl: system l enable (selects am sound and positive video modulation, MC44353 only). 8. tpen: test pattern enable (picture and sound). 9. n 0 to n 11 : uhf frequency programming bits, in steps of 250 khz. data first data byte (c1 or fm) figure 5. high speed i 2 c compatible bus data format chip address ($ca) scl sta sda ack ack ack 123456 78910111213141516171819 4445 sto
MC44353 mc44354 mc44355 6 motorola analog ic device data video characteristics characteristic test conditions min typ max unit type video bandwidth (0/1.0 db; ref 0 db @ 100 khz) 5 - mhz c video input level 1.5 v cvbs d video input current 50 200 na a peak white clip (note 1) 108 112 116 % b video input impedance measured at 1.0 khz (at pin 13) 500/4 k w /pf d video s/n see note 2 figure 6 figure 6 db c differential phase see note 2 figure 7 figure 7 figure 7 c differentical gain on line ccir 310, worst from the first 4 steps out of 5 1.0 5 % c luma/sync ratio input ratio 7.0:3.0 6.8/3.2 7.2/2.8 b pal video modulation depth step 3 p bli8 f25% 76 82 88 % b secam video modulation depth step 5 (MC44353 only) programmable in 8 steps of 2.5% 84.5 90.5 96.5 % b notes: 1. the circuit is equipped with a 'soft clip' function. the video modulation depth is measured for a 1.0 v cvbs input level, giving modulation depth mda; then the same measurement is carried out for an input level of 1.5 v cvbs , giving modulation depth mdb. the peak white clip is defined as 100*(mdb)/(mba). 2. the frequency dependent specifications are greatly influenced by the pcb layout in the application. these specifications have all been measured using a motorola application layout and circuit similarly as shown in figures 19 and 21. the reference number for ordering this evaluation board is mc44350evk. 6.0 60 21 db channel number 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 55 50 45 typical performance maximum specification limit 21 degrees channel number 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 8.0 typical performance maximum specification limit 4.0 2.0 0 2.0 4.0 6.0 8.0 minimum specification limit figure 6. video signal to noise figure 7. differential phase
MC44353 mc44354 mc44355 7 motorola analog ic device data audio characteristics characteristic test conditions min typ max unit type audio input level am step 3, (secam) for 85% am modulation of sound bi 240 290 340 mvrms b @ fs = 6.5 mhz, (for 8 steps see table 4 MC44353 only) subcarrier 6.5 mhz audio input level fm step 3 f / 40 kh d i i i 240 305 370 mvrms b @ fs = 5.5, 6.0 or 6.5 mhz, (for 8 steps see table 4 MC44353/4 only for +/ 40 khz deviation using specified preemphasis circuit 5.5 mhz audio input level fm spec ifi e d preemp h as i s c i rcu i t ( fm ) , audio fre q uenc y = 1.0 khz 155 195 235 mvrms b @ fs = 5.5, 6.0 or 6.5 mhz (mc44355 only) (fm) , audio frequency= 1 . 0 khz 5.5 mhz audio input level fm step 3 f20khdii i 240 305 370 mvrms d fs = 4.5 mhz (ntsc), (for 8 steps see table 4 MC44353/4 only for 20 khz deviation using specified preemphasis circuit audio input level fm ppp (fm), audio frequency= 1.0 khz 155 195 235 mvrms d fs = 4.5 mhz (ntsc) (mc44355 only) audio input resistance at 15 khz 30 50 75 k w b audio frequency response minimum 3.0 db; ref 1.0 khz; using specified preemphasis circuit 40 hz d minimum 1.5 db; ref 1.0 khz; using 60 hz d maximum ;;g specified preemphasis circuit 15 khz d audio distortion fm (thd only) @ 1.0 khz; 100% mod ( 50 khz no video 0.4 2 % c audio distortion am (thd only) @ 1.0 khz; 85% mod, no video 1.5 2.5 % d audio s/n with sync buzz fm see figure 8 figure 8 figure 8 db c audio s/n with sync buzz am ref 1 khz; 85% mod; video input ebu color bar 75%; audio bw 40 hz to 15 khz weighing filter ccir 4682 45 50 db d sound/picture ratio step 3 (8 steps of 1.0 db, see table p/s ratio MC44353/4 only) step 3 (typ 80%) pal & step 1 (typ 80%) secam video mod depth 11 14.5 18 db b sound/picture ratio step 5 (2 settings, see table p/s ratio mc44355 only) 13 16.5 20 db b note: 1. the frequency dependent specifications are greatly influenced by the pcb layout in the application. these specifications have all been measured using a motorola application layout and circuit similarly as shown in figures 19 and 21. the reference number for ordering this evaluation board is mc44350evk. 60 21 db channel number 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 55 50 45 typical performance maximum specification limit figure 8. audio signal to noise
MC44353 mc44354 mc44355 8 motorola analog ic device data high frequency characteristics characteristic test conditions min typ max unit type rf output level see note 1 and figure 9. figure 9 figure 9 figure 9 db m v b output inhibit attenuation see note 1 and figure 10. figure 10 figure 10 figure 10 db c uhf oscillator frequency minimum using specified circuit 450 mhz d uhf oscillator frequency maximum using specified circuit 860 mhz d sound subcarrier harmonics (f p + n*fs) ref picture carrier 62 54 dbc max: d typ: c second harmonic of chroma subcarrier using red ebu bar 71 60 dbc c chroma/sound intermodualtion: using red ebu bar 81 72 dbc c f p + (f snd f chr ) f o (picture carrier) spurious see note 1 and figure 11. figure 11 figure 11 db m v c f o (picture carrier) harmonics see note 1 and figure 12. figure 12 figure 12 db m v c in band spurious (f o 5.0 mhz) no video or sound modulation 75 dbc c f 0 + f 1 intermodulation product f o = 599.25 mhz f 1 = 200 mhz (at 80 db m v f 0 + f 1 = 799.25 mhz 60 dbc d note: 1. the frequency dependent specifications are greatly influenced by the pcb layout in the application. these specifications have all been measured using a motorola application layout and circuit similarly as shown in figures 19 and 21. the reference number for ordering this evaluation board is mc44350evk. 83 70 db v m 65 db v m 50 86 21 db v channel number 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 84 82 80 typical performance maximum specification limit minimum specification limit 81 85 typical performance maximum specification limit 65 21 db channel number 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 55 45 35 40 60 figure 9. rf output level figure 10. rf output inhibit attenuation frequency mhz frequency mhz figure 11. f o (picture carrier) spurious figure 12. f o (picture carrier) harmonics 90 50 150 250 350 450 550 650 750 850 950 1050 1150 1250 80 70 60 50 40 30 20 10 0 10 20 450 650 850 1050 1250 1450 1650 1850 2050 2250 2450 2650 85 80 75 60 55 50 45 40 rf output level rf output level typical performance maximum specification limit maximum specification limit typical performance m 2f o 3f o
MC44353 mc44354 mc44355 9 motorola analog ic device data modulator functional description general the device has two main sections; a pll section to synthesize the channel frequency of the uhf output and a modulator section which accepts audio and video inputs and modulates the uhf carrier with them. the channel frequency, sound and picture modulation index and sound/picture carrier ratio are all programmable by means of a high speed i 2 c compatible bus. an onchip video test pattern generator with an audio test signal is also included. the MC44353 is designed to operate as a multistandard modulator and can handle the systems b/g, d/k, h, i, l and n with the same external circuit components. the basic elements of the circuit are shown in figure 1. the bus receiver the bus receiver operates i 2 c compatible bus data format. additional information on the data format is given on page 5. the chip address (i 2 c bus) is: 1 1 0 0 1 0 1 0 (ack) = $ca (hex). each ninth data bit (bits 9, 18, 27, 36 and 45) is an ack (acknowledge bit) during which the mcu sends a logic a1o and the modulator circuit answers on the data line by pulling low. besides the chip address the circuit needs 4 data bytes for operation. these bytes are defined in the section on control bits. the following sequences of data bytes are permitted: example 1 ca c1 c0 example 2 ca fm fl example 3 ca c1 c0 fm fl example 4 ca fm fl c1 c0 for the significance of the control bits the section on control and test bit assignments on pages 11 and 12 should be consulted. pll section the programmable divider the programmable divider's division ratio is controlled by the state of control bits n0 to n11. the division ratio is given by: n = 2048*n11+ 1024*n10 + . . . . + 4*n2 + 2*n1 + n0. max. ratio = 4095 min. ratio = 17. the prescaler the prescaler is a fixed divide by 8 and is permanently engaged. it has a preamplifier for high sensitivity and good decoupling from the rf section. the phase comparator the phase comparator has a current source/sink characteristic (charge pump, see figure 13). the pump current is 4.0 m a. in normal operation (state 4) the phase comparator pulls high if the uhf oscillator frequency is too high. an internal amplifier is provided to generate tuning voltages greater than 5.0 v while inverting the output. the phase comparator can also be programmed to work (in state 0) with the opposite charge pump polarity. in this case the phase comparator pulls low if the uhf frequency is too high. in this mode the amplifier is not required. the filter components may be connected directly to the phase comparator output pin. the tuning voltage range is then from just above 0 v to v cc (5.0 v typical) and therefore not all channels can be synthesised without adjusting the circuit inductance. control bits t0, t1 and t2 are used to control the operational state of the phase comparator. a truth table is shown in the control bits section. state 4: normal operation with inverted charge polarity. 10 nf 4.7 nf 240 k w 560 k w bias amp in 330 pf op out 30 v v cc on/off on/off gnd 4.0 m a 4.0 m a amp in amp in 10 nf 4.7 nf 240 k w state 0: normal operations with noninverted charge polarity. figure 13. output configuration of the phase comparator the reference divider this divider divides by 128 resulting in a reference frequency of 31.25 khz with a 4.0 mhz crystal. the uhf oscillator frequency may be synthesised in steps of 250 khz. the 250 khz steps are due to the presence of a divide by 8 prescaler prior to the programmable divider. the reference divider also generates the timing signals te1 and te2 for the on-chip test pattern generator and the audio test signal. the reference divider also provides the 7.8 khz reference frequency for the sound pll.
MC44353 mc44354 mc44355 10 motorola analog ic device data test pattern generator a simple test pattern is generated on the ic which can be switched in under bus control to permit a tv receiver to easily tune in to the modulator output. the pattern consists of two white vertical bars on a black background and a 976 hz audio test signal. 30 28 3/10 figure 14. tpsg typical video waveform te2 te1 7/10 01020 24 40 44 50 60 64 time in m s modulator section video inputclamp and peak white clip the modulator requires a composite video input with negative going sync pulses and a nominal level of 1.0 v pp . this signal is ac coupled to the video input where the sync tip level is clamped. the video signal is then passed to a peak white clip circuit whose function is to soft clip the top of the video waveform if the amplitude from the sync tip to peak white goes too high. in this way over-modulation of the carrier by the video is avoided. sound subcarrier modulator the sound modulator system consists of an fm modulator incorporating the sound subcarrier oscillator, and an am modulator. the audio input signal is ac coupled into the amplifier which then drives the two types of modulator. in order to provide the accuracy needed for sound subcarrier frequencies, the sound oscillator consists of a phase/frequency locked loop. an external lc tank circuit is required, and the oscillator frequency is controlled by varicap tuning diodes. the resulting oscillator frequency is divided down by a divider whose ratio can be controlled via the bus. a phase/frequency comparator is then used to compare this frequency with a reference frequency (fref 2), obtained from the main pll section. the resulting error voltage is used to control the varicap. to allow all tuning voltage to be derived from v cc , a hyperabrupt type of tuning diode is required to cover the necessary capacitance range. if only a single sound subcarrier frequency is being used, for example for pal only or ntsc, then a less abrupt varicap diode may be used. the sound phase frequency comparator also requires an external loop filter. the oscillator provides subcarrier frequencies of 4.5, 5.5, 6.0 and 6.5 mhz, selectable via the bus. for all applications except system l, the subcarrier is frequency modulated with the audio signal. for system l, amplitude modulation is employed. the level of audio at the input needed to give the maximum permissible modulation depth (50 khz fm deviation, 85% am depth), may be adjusted under bus control. uhf oscillator the uhf oscillator is designed to operate over a range of 450 to 860 mhz. the oscillator drives an external lc tank circuit differentially, and is tuned by a varicap diode. the varicap tuning voltage, as described in an earlier section, is provided from an on chip operational amplifier and external filter arrangement which is controlled by the pll section of the chip. the uhf frequency thus generated is used by the modulator as the tv channel carrier frequency. video modulator and sound mixer this section of the circuit accepts as inputs: 1. composite video; 2. the selected sound subcarrier i 2 c frequency; 3. the uhf carrier frequency at the selected channel; 4. the test pattern generator waveform. selection is made via the control bus between the composite video input and the on chip test pattern generator. the video and sound inter-carrier are used to amplitude modulate the uhf carrier. negative modulation is used, except in the case of system l where positive modulation is used.in this part of the circuit, the video modulation depth and the sound to picture carrier ratio may be programmed under bus control. in system l mode the video modulation depth has the same range, but may extend to higher percentage values. rf o/p buffer the tv signal generated in the video modulator and mixer section is fed to an emitter follower output stage, capable of driving a terminated line. this output is provided with a separate v cc pin in order to avoid large circulating currents on the ic. it can provide at the output typically 84 db m v of signal across a 75 w load. transient output inhibit to minimize the risk of interference to other channels while the uhf pll is acquiring lock on the desired frequency at power-on, the uhf output stages are turned off for each power-on from zero and from standby mode. there is a timeout of 263 ms until the output is enabled. this allows the pll to settle on its programmed frequency. care must be taken therefore in determining the loop filter components so that the loop transient does not exceed this delay. data retention the circuit contains 4 bytes of memory holding the last frequency and control bits information. the circuit can retain this information at power down if a suitable v cc is supplied. the standby v cc of nominal 5.0 v must be applied to pin v cc mod. the 5.0 v current in data retention is approximately 500 m a. note that the voltage source on this pin must be able to supply a much higher current in normal operation (typically 12 ma). the circuit will enter into data retention mode when the v cca pin voltage drops below approximately 3.0 v.
MC44353 mc44354 mc44355 11 motorola analog ic device data test modes various test modes can be enabled, by means of bits tb02 and x01. these operate by assigning some internal signals on the uhf phase comparator output current sources as outlined in the following 2 tables. table 1. test mode 1 test bits tb0 to tb2 are located in c0, bits 0 to 2: tb2 tb1 tb0 state function 0 0 0 0 see table test mode 2 0 0 1 1 normal operation, but test 0 0 1 1 pattern geneartor disabled 0 1 0 2 upper source on, lower 0 1 0 2 source off 0 1 1 3 lower source on, upper 0 1 1 3 source off 1 0 0 4 normal operation with 1 0 0 4 inverted charge polarity 1 0 1 5 high impedance 1 0 1 5 1 1 0 6 test ref divider on upper 1 1 0 6 source (f ref ), lower source off 1 1 1 7 test progr. divider on lower 1 1 1 7 source (f out/2 ), upper source off table 2. test mode 2 bits x0 and x1 are located in fl, bits 0 and 1: x1 x0 state function 0 0 0a normal operation with noninverted 0 0 0a charge pump polarity 0 1 0b normal inverted operation (same as 0 1 0b mode 4), but transient output inhibit disabled. 1 0 0 normal inverted operation (same as 1 0 0c mode 4), but transient output inhibit circuitry forced (output disabled). 1 1 0d normal inverted operation (same as 1 1 0d mode 4), but transient output inhibit counter sped up (64 times). in normal operation, the phase comparator pulls high if the uhf frequency is too high, and pulls low when the uhf frequency is too low. this mode is used when the tuning voltage is generated by the internal inverting operational amplifier, so in this case mode 4 (100) must be used. switching in mode 0d will reset the transient delay counter, which will time out at an accelerated rate of 64 times the normal rate. sound section test modes the sound pll is tested in a similar fashion, and responds to states 6 and 7 by placing the output of the sound pll programmable divider on the upper current source. table 3. sound subcarrier frequency sfd1 sfd0 sound subcarrier freq (mhz) 0 0 4.5 0 1 5.5 1 0 6.0 1 1 6.5 note: 1. bits sfd10 are located in c0 bits 4 and 3. figure 15. ccir test line 330 *1.0 0.86 0.72 0.58 0.44 **0.3 step 0 1 2 3 4 5 note: not to scale *100 ire ** 1 ire volts 40 16 approximately characteristic of standard independent filter in conformity with ccir rec. 567 0 4 8 12 012345 a f decibels mhz figure 16. noise measurement/weighting filter
MC44353 mc44354 mc44355 12 motorola analog ic device data table 4. audio modulation sensitivity (control bits) amd2 amd1 amd0 audio input for fm pal/ntsc (MC44353/4) audio input for am secam (MC44353 only) audio input for fm pal/ntsc (mc44355 only) 0 0 0 420 mvrms 405 mvrms not programmable 0 0 1 375 mvrms 365 mvrms not programmable 0 1 0 335 mvrms 325 mvrms not programmable 0 1 1 300 mvrms 290 mvrms not programmable 1 0 0 270 mvrms 260 mvrms not programmable 1 0 1 240 mvrms 230 mvrms not programmable 1 1 0 215 mvrms 205 mvrms not programmable 1 1 1 190 mvrms 185 mvrms 190 mvrms note: 1. audio sensitivity bits amd20 are located in c1 bits 6 to 4. table 5. picture to sound carrier ratio (control bits) psd2 psd1 psd0 p/s carrier ratio (MC44353/4) p/s carrier ratio (mc44355 only) 0 0 0 11.5 db not programmable 0 0 1 12.5 db 12.5 db 0 1 0 13.5 db not programmable 0 1 1 14.5 db not programmable 1 0 0 15.5 db not programmable 1 0 1 16.5 db 16.5 db 1 1 0 17.5 db not programmable 1 1 1 18.5 db not programmable note: 1. picture to sound carriers ratio bits psd20 are located in c1 bits 3 to 1. table 6. video modulation depth (control bits) vmd2 vmd1 vmd0 video mod depth pal (MC44353/4) video mod depth secam (MC44353 only) video mod depth pal (mc44355 only) 0 0 0 74.5% 78% not programmable 0 0 1 77% 80.5% not programmable 0 1 0 79.5% 83% not programmable 0 1 1 82% 85.5% 82% 1 0 0 84.5% 88% not programmable 1 0 1 87% 90.5% not programmable 1 1 0 89.5% 93% not programmable 1 1 1 92% 95.5% not programmable notes: 1. video modulation depth bits vmd20 are located in c0 bits 7 to 5. 2. secam values are approximately 5% higher than pal values.
MC44353 mc44354 mc44355 13 motorola analog ic device data 16 amp in negative input of operation amplifier and phase detector charge pump output 20 xtal crystal oscillator (4.0 mhz) 18 scl clock input (i 2 c bus) 19 sda data input/output (i 2 c bus) 14 mod gnd 13 video in input for baseband video. signal modulates the rf carrier. 11 audio in input for sound. signal modulates the sound carrier. snd fil 8 phase/freq. detector charge pump output figure 17. pin circuit schematic op out 1 operational amplifier output which provides the tuning voltage v ccd 3 digital circuit supply osc gnd 7 oscillator ground 500 132 k 20 v v cc 96 k 96 k 1/2 v cc 500 132 k 20 v 5.0 v 100 2.0 k 10 k 20 v 20 v 20 v 50 1.5 k ack v cc 96 k 96 k 1/2 v cc osc gnd 4 oscillator ground preem 10 frequency selective filter to shape sound modulation depth. snd tun 9 sound carrier oscillator l/c tuned circuit 5 6 bal osc balanced cross coupled oscillator terminals. l/c resonance circuit 12 v cca audio supply voltage 15 rf out rf output 16 v cc mod 17 mod gnd v cca 72 490 v cca v cca 24.5 k 24.5 k 50 k 1.0 p 5.0 v 5.0 v 5.0 v 5.0 v 5.0 v 5.0 v audio
MC44353 mc44354 mc44355 14 motorola analog ic device data figure 18. typical application r10 240 k w 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 amp in xtal op out sda v ccd scl gnd mod gnd osc1 v cc mod osc2 rf out gnd mod gnd snd filt video snd tun v cca preem audio MC44353 c22 0.1 c21 330 pf r11 560 k c19 0.0047 r6 33 k w c13 0.022 r5 220 k w c12 0.0022 r4 100 k hvur17 hvur17 l2 27 m h r8 47 k w c10 0.1 c16 0.001 (note 2) c17 0.001 (note 2) r9 47 k w d3 hvu202a c18 0.1 r7 220 k w c9 220 pf c8 100 pf l1 6.8 nh (note 3) 30 v v cct cx (note 1) 4.0 mhz sda scl high speed bus c1, 2 0.2 75 w 1% c3 0.01 c5 0.001 c6 0.1 5.0 v tv out video in audio in notes: 1. cx depends on crystal load capacitance, crystal resistance < 200 w . 2. tubular 0603 1.0 nf capacitors. 3. l1 is a 2 turn air coil. 4. l2 and r3 are nonsurface mount components. note l2 quality factor should be high enough to keep the sound carrier at the typical level q min @ 5.5 mhz = 43, q min @ 6.0 mhz = 40, and q min @ 6.5 mhz = 37. 5. c11 and l2 are selected to control the sound carrier center frequency and its tuning range. 6. d1 and d2 are hyperabrupt varactor. minimum capacitance ratio between 1.0 and 4.5 v is c1/c4.5 = 5.6 to cover the full frequncy range. (c @ 1.0 v = 50 pf min) c4 0.1 r1 1.0 k c20 0.01 c14, 15 0.22 c11 c7 10 m f r2 r3 4.7 w (note 4) (note 5) (note 4) d1 d2 modifications to the application layout (figures 19 through 21) will have an effect on the overall application performances. the most sensitive areas are around the uhf oscillator and rf output (pins 4 to 7 and pins 14 to 17) so care must be taken to reproduce a similar pcb layout in the final application.
MC44353 mc44354 mc44355 15 motorola analog ic device data figure 19. pcb layout for so20l (top layer) v cct gnd v cc v cc gnd scl sda gnd scale 2:1 d1 d2 c10 c11 r4 r5 c12 c14 c15 c8 r8 r7 c9 c4 c16 d3 c17 l1 c20 r10 c19 r11 c21 c18 c22 c1 c3 r2 c5 c6 cx p1 r1 r9 c7 c2 u1 15 pin d connector c13 r6
MC44353 mc44354 mc44355 16 motorola analog ic device data figure 20. pcb layout for tssop20 (top layer) v cct gnd v cc v cc gnd scl sda gnd scale 2:1 15 pin d connector d1 d2 c10 c11 r4 r5 c12 c14 c15 c8 r8 r7 c9 c4 c16 d3 c17 l1 c20 r10 c19 r11 c21 c18 c22 c1 c3 r2 c5 c6 cx p1 r1 r9 c7 c2 u1 c13 r6
MC44353 mc44354 mc44355 17 motorola analog ic device data figure 21. pcb layout for so20l and tssop20 used for characterization (bottom layer) scale 2:1
MC44353 mc44354 mc44355 18 motorola analog ic device data dtb suffix plastic package case 948e02 (tssop20) issue a outline dimension dim a min max min max inches 6.60 0.260 millimeters b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.27 0.37 0.011 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1 dimensioning and tolerancing per ansi y14.5m, 1982. 2 controlling dimension: millimeter. 3 dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4 dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5 dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6 terminal numbers are shown for reference only. 7 dimension a and b are to be determined at datum plane w. 110 11 20 pin 1 ident a b t 0.100 (0.004) c d g h section nn k k1 jj1 n n m f w seating plane v u s u m 0.10 (0.004) v s t 20x ref k l l/2 2x s u 0.15 (0.006) t detail e 0.25 (0.010) detail e 6.40 0.252 s u 0.15 (0.006) t dw suffix plastic package case 751d04 (so20wb) issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.150 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.13 (0.005) total in excess of d dimension at maximum material condition. a b 20 1 11 10 s a m 0.010 (0.25) b s t d 20x m b m 0.010 (0.25) p 10x j f g 18x k c t seating plane m r x 45 dim min max min max inches millimeters a 12.65 12.95 0.499 0.510 b 7.40 7.60 0.292 0.299 c 2.35 2.65 0.093 0.104 d 0.35 0.49 0.014 0.019 f 0.50 0.90 0.020 0.035 g 1.27 bsc 0.050 bsc j 0.25 0.32 0.010 0.012 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 10.05 10.55 0.395 0.415 r 0.25 0.75 0.010 0.029
MC44353 mc44354 mc44355 19 motorola analog ic device data motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. atypicalo parameters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motorola, inc. motorola, inc. is an equal opportunity/affirmative action employer.
MC44353 mc44354 mc44355 20 motorola analog ic device data mfax is a trademark of motorola, inc. how to reach us: usa / europe / locations not listed : motorola literature distribution; japan : nippon motorola ltd.: spd, strategic planning office, 141, p.o. box 5405, denver, colorado 80217. 13036752140 or 18004412447 4321 nishigotanda, shagawaku, tokyo, japan. 0354878488 customer focus center: 18005216274 mfax ? : rmfax0@email.sps.mot.com touchtone 1 6022446609 asia / pacific : motorola semiconductors h.k. ltd.; 8b tai ping industrial park, motorola fax back system us & canada only 18007741848 51 ting kok road, tai po, n.t., hong kong. 85226629298 http://sps.motorola.com/mfax/ home page : http://motorola.com/sps/ MC44353/d ?

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